The present invention is in the field of reducing microprocessor power dissipation. More particularly, the present invention comprises a method, apparatus, and system to reduce core leakage power of a microprocessor.
An important design factor for portable devices is power dissipation. A personal digital assistant or a notebook computer, for example, operating on battery power, can only last as long as its battery. As such, designers of both microprocessors for portable devices and portable microprocessor-operated devices, look for ways to reduce power dissipation.
One way to reduce power dissipation in microprocessor-operated devices is to determine where power is wasted. Microprocessors connected to a power supply have a core leakage power. Core leakage power is getting worse for each microprocessor generation. Core leakage power is wasted power, typically in the form of heat, and it increases as a percentage of total microprocessor power. In a 0.81 micron process, a Pentium III microprocessor, for example, can leak as much as six watts, contributing 30% of the total microprocessor power. Thus, the more complex the microprocessor becomes, the greater its core leakage power. In fact, additional power is sometimes used to remove heat from a microprocessor-operated device to prevent the microprocessor from overheating.
As a way of reducing power dissipation, microprocessors are typically designed to switch between different operating states. In particular, a portable microprocessor-operated device may repeatedly change from a high power dissipation state to a low power dissipation state. Any operating state for a microprocessor that requires nominal operating voltage and a nominal operating frequency in the microprocessor core is a high power dissipation state. A low power dissipation state is any operating state of the microprocessor where the operating voltage or operating frequency of the microprocessor can be reduced below nominal values. A microprocessor can be placed in a low power dissipation state when the microprocessor is not being asked to perform a function that requires action by the microprocessor""s core. For example, when a person requests a computer to calculate a number or a series of numbers, the microprocessor""s core is probably being used and the microprocessor remains in a high power dissipation state. On the other hand, when the computer completes the calculation and displays the answer on the screen, the microprocessor""s core may do nothing while the user reviews the answer. When the microprocessor""s core is not required to perform an action, the microprocessor can change to a low power dissipation state.
Several important factors are involved in designing a microprocessor to enter a low power dissipation state. First, the microprocessor designer will determine or assume the types of functions regularly required of the microprocessor""s core. Even when the user is not requesting calculations to be performed, the microprocessor operated device may require some functions to be performed. For devices that have memory, one function that may need to be performed is snooping. Data placed in memory may be stored in more than one memory location to improve data access speed and snooping refers to a function performed by a microprocessor to maintain coherency for the same copy of data stored in multiple locations, e.g. dynamic random access memory (DRAM), level two cache, and level one cache.
Second, the latency involved in changing from the high power dissipation state to the low power dissipation state can be considered. A calculator, for example, that takes longer to change from the low power dissipation state to the high power dissipation state than it takes the user to sum two numbers, can lose its usefulness for summing two numbers if the calculator enters the low power dissipation state each time the user looks up a number. Designers, therefore, balance the inconvenience of latency to change operating states against the inconvenience of running out of battery power.
Third, the reduction of power dissipation gained by entering a low power dissipation state can be considered. Multiple low power dissipation states are possible with varying latencies, so the design can balance the different low power dissipation states available against the latency involved with transitioning to each low power dissipation state.
Several problems arise when attempting to balance these factors. One problem is the requirement to remain in a high power dissipation state to snoop memory since it maintains the core leakage power at a high level. A second problem is that a core leakage power increasing as a percentage of total microprocessor power, limits the performance of microprocessors in portable microprocessor-operated devices. In particular, while total microprocessor power increases at a faster pace than battery power technology, either the size of the battery for portable microprocessor-operated devices will become larger to allow the same usage time or the usage time will become shorter, creating a significant drop in performance for portable devices as compared to devices that operate on external power sources. In either case, the portable microprocessor-operated device becomes less desirable. Additionally, high latency involved in changing to low power dissipation states limits the ability to operate microprocessors in the low power dissipation states.